| 摘要 |
PURPOSE:To simplify the titled circuit by adding each current output of two multipliers in opposite phase to each other to take a difference between the multiplier outputs thereby using the result as a control signal of a signal proces sing circuit. CONSTITUTION:The signal processing circuit 1 consists of limiter circuits 2,3, two multiplexers 4,5, and a current mirror comprising diodes D1,D2 and tran sistors (TRs) Q21,Q22, and a current change of the multiplexers 4,5 from lines l5,l6 is outputted as a current difference signal represented as 2(is1-is2). The current difference signal is converted into a DC control signal Vc by an LPF11, the control signal is fed to a voltage-controlled oscillator 12 to control the oscillated frequency. A frequency signal f0 having a 90 deg. phase difference from a frequency signal f0' is outputted by using the frequency from the oscillator 12 and the frequency signals f0' is outputed by using the frequency from the oscillator 12 and the frequency signals f0' and f0 control the characteristic of phase comparators 22,21. Thus, the circuit constitution is simplified without providing a voltage comparator or the like to the processing circuit. |
