发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 <p>PURPOSE:To decrease the limitation of function in stopping the operation of a CPU by retarding a stop request signal in the inside of a CPU and stopping a clock after the retarded signal is coincident with the stop request signal not retarded. CONSTITUTION:The function stop request signal (-HALT) 12 to the CPU is delayed by a shift register 16, the signal is inputted to an OR circuit 16 together with the signal not delayed, its output is fed to an AND circuit 17 to apply gate control to a clock signal 11. As a result, the clock signal 11 to the CPU is stopped only after a delay time of the shift register 16 is elapsed after the (-HALT) 12 is supplied. Since status information from the CPU passes through gates 18, 19 during this time, the function limit of the CPU is reduced for a while even after the (-HALT) signal is applied.</p>
申请公布号 JPS61147323(A) 申请公布日期 1986.07.05
申请号 JP19840269992 申请日期 1984.12.21
申请人 TOSHIBA CORP 发明人 TOKUMARU TAKEJI
分类号 G06F1/04 主分类号 G06F1/04
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