| 摘要 |
PURPOSE:To generate plural burst signals having each different frequency by inserting a delaying circuit which can control a delay time in a loop of each PLL, cutting a necessary part of an output of an oscillator by a gate circuit, and keeping the mutual time relation constant. CONSTITUTION:When a PLL-B is in a synchronizing state, a phase of a signal S2 is not 0 deg. at the time of arise of a gate signal G2, therefore, a value of a delay time quantity DELTAD2 of a delaying circuit 17 of the PLL-B is varied by using a signal DC2 so that a fall of an output signal V2' which has been delayed by tau from an output signal D2 of the delaying circuit 17 is synchronized with a fall of an input clock signal REF. An output burst signal B2' of a gate circuit 16, which appears in some time area by a logic 1 of the signal G2 becomes zero volt at the time of a rise of the signal G2.
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