| 摘要 |
PURPOSE:To prevent a titled device from being awaited longer than required, and to improve the throughput of a system by constituting said device so that other processing is executed by interruption processing, when a bus master whose priority degree is low outputs a request signal and it is kept waiting for many hours. CONSTITUTION:When a CPU11 executes access to system buses 5, 6 and 7, a request signal is outputted, and simultaneously, a timer 21 is operated, and after a prescribed time has elapsed, a time-out signal is outputted from a signal line 22. The CPU11 receives no interruption because it is in a waiting state. A priority signal is generated in a priority signal line 10, and even if a bus busy signal is outputted in advance to a bus busy line 4, an unused signal is generated in a bus master busy signal line 25, therefore, a bus access control device 18 outputs an authorized signal to an authorized signal line 19. The CPU11 is released as to its wait, but each buffer 15, 16 and 17 of a command, an address and data continues an inhibited state. The CPU11 receives an interruption by the time-out signal, enters interruption processing and withdraws the request signal. |
