Phase-locked loop frequency synthesiser with a variable modulus prescaler.

摘要

A three modulus prescaler for a phase-locked loop frequency synthesizer includes a No modulus prescaler inputting into a divide-by-two circuit. A microprocessor and internal logic control a three modulus prescaler synchronizer to receive signals from the divide-by-two circuit and output control commands to the No modulus prescaler so as to cause the N0 modulus prescaler to divide solely by a first or second modulus, or alternately between said first and second modulus, between output pulses of the divide-by-two circuit to extend the synthesizer's bandwidth.