发明名称 |
Method of designing a logic circuitry. |
摘要 |
<p>Logic is synthesized from a flowchart-level description by first generating an AND/OR logic design (104), simplifying the AND/OR logic, converting the AND/OR logic to NAND or NOR logic (106), applying particular sequences of simplifying transformations to the NAND or NOR logic, converting the simplified NAND or NOR logic to a target technology (108), and simplifying the target technology where possible. The end result is an interconnection of primitives of the target technology in a language from which automated logic diagrams can be produced.</p> |
申请公布号 |
EP0168650(A2) |
申请公布日期 |
1986.01.22 |
申请号 |
EP19850107444 |
申请日期 |
1985.06.19 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
DARRINGER, JOHN A.;JOYNER, WILLIAM HENRY, JR. |
分类号 |
G06F17/50 |
主分类号 |
G06F17/50 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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