| 摘要 |
PURPOSE:To obtain a self-refresh type D.RAM small in occupation area and excellent in stability by connecting three MOSFETs and one capacitor, and setting properly the value of an applied voltage and phase relation. CONSTITUTION:The N type enhancement MOSFETs 411-413 are connected to the capacitor 451. Then when the level of a word line 431 goes up to ''1'' and data (''1'' or ''0'') on a bit line 421 is transmitted to the gate of the FET412 through the FET411, the data is written in a RAM. In such a case, when the data on the line 412 is ''1'', the FET413 turns on and when ''0'', the FET413 turns off. Then, if cycles where no address is selected succeed, the gate voltage of the FET413 drops by a specific value at every time. |
