| 摘要 |
PURPOSE:To improve the processing capacity of a vector data processor by controlling only an operating pipeline by a clock stop, and reading out a data by a free run, as for an access pipeline. CONSTITUTION:In a vector data processor, when a load data from a main storage device 1 is exhausted, a pipeline control part 6 executes a clock stop to a read-out pipeline based on various chain information from an instruction control part 5. That is to say, it is operated so as to keep a sequential property between a vector load instruction and a vector operating instruction. In this case, the clock stop is executed to only an operating pipeline LAP, and as for an access pipeline STP being other read-out pipeline, the control is executed so as to make it a free run. In this way, the regular vector store processing is executed continuously, a rise of the vector store instruction can be executed quickly, and the processing capacity of the vector data can be improved. |
