| 摘要 |
PURPOSE:To improve a step coverage as well as to intensify the electromigration-resisting property of the titled device by a method wherein a wiring is formed into the structure having three layers consisting of a polycrystalline Si, high melting point metal silicide and Al or Al-Si. CONSTITUTION:The wiring, consisting of Al 5, high melting point metal silicide 10 and polycrystalline Si 9, is connected to the diffusion layer 8 of a semiconductor substrate 7 through the contact hole of an insulating layer 6. According to this wiring structure, polycrystalline Si is accumulated by performing a CVD method after a contact hole has been formed on the layer 6. Said polycrystalline Si deposited by CVD has a microscopically formed contact hole, and the step coverage is excellent even when a steep stepped part is formed, thereby enabling to prevent the generation of disconnection of wire. Also, the silicide 10 has a strong electromigration-resisting property, a wiring pattern is microscopically formed, and the electromigration generating when a large scale integrated circuit (LSI) is in operation can be prevented even when the area of cross-section is reduced. |
