发明名称 CONTROL SYSTEM FOR STATE RECORD MEMORY
摘要 PURPOSE:To increase the number of cycles of a history state which can be stored without increasing the capacity of a history memory, etc., by dividing the history memory, etc. so that an access is possible for each prescribed area and storing the history states when necessary to those divided area in a circulating form. CONSTITUTION:In case the 1K MODE signal shown at the left end is not equal to an extension mode, an incrementer 15 supplies cyclically an address of an address register 14 to a history memory 11. While the prescribed history data is written to an area of one word and 64 bits forming the memory 11. Therefore the history data of 256 cycles is still stored in the memory 11 in case the rewriting of the history data is stopped to the memory 11. When the 1K MODE signal is equal to an extension mode, the incrementer supplies cyclically an address 0 or one of 255 addresses of an address register 14 to the memory 11. At the same time, a carry delivered from a bit 2 of the incrementer 15 is transmitted to a bit 1 and therefore functions as an incrementer having 10 bits.
申请公布号 JPS60181846(A) 申请公布日期 1985.09.17
申请号 JP19840037712 申请日期 1984.02.29
申请人 FUJITSU KK 发明人 TONE HIROSADA
分类号 G06F11/34;G06F12/06 主分类号 G06F11/34
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