发明名称 COMPANDING DIGITAL-ANALOG CONVERTER
摘要 PURPOSE:To decide the operation speed of an analog circuit low by using linear D/A converters of 6-bit and 8-bit and realizing the 15 polygonal line approximation characteristic having the companding rule with mu=255 so as to reduce the element accuracy until the large scale circuit integration is attained without trimming. CONSTITUTION:A digital input is read by a logical control circuit 12, a switch 9 is changed over with a signal code so as to input a reference voltage, and when the section code indicates the 1st-5th section, a switch 10 is changed over to the output side of the 6-bit linear D/A converter 6, and when the code indicates the 6th-8th section, the switch 10 is changed over to the output side of a 8-bit D/A converter 7. Moreover, when the section code indicates the 1st-5th section, an output of the 8-bit linear D/A converter 7 is applied to the 6-bit linear D/A converter 6 as an external reference voltage, where the output is decoded, and when the section code indicates the 6th-8th section, the signal is decoded directly by the 8-bit linear D/A converter 7.
申请公布号 JPS6062728(A) 申请公布日期 1985.04.10
申请号 JP19840138249 申请日期 1984.07.04
申请人 NIPPON DENSHIN DENWA KOSHA 发明人 YOSHIDA KOUICHI;KUROSAWA HIDEYUKI
分类号 H03M1/38;H03M1/46;H03M1/68;(IPC1-7):H03M1/68 主分类号 H03M1/38
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