| 摘要 |
PURPOSE:To perform a refreshing operation optional times without causing any disturbance to a CPU during the refreshing operation by controlling the frequency of refreshing operation externally and freely with a clock input from a refresh terminal and a refresh frequency input to an address terminal. CONSTITUTION:A refresh frequency input counting circuit 11 operates the internal timer with an activation signal 15 from a refresh control circuit 13 to measure a cycle (minimum cycle) time for the refreshing operation, and outputs an operation instruction signal 17 to a refresh address generating circuit 12 while counting down the refresh frequency at said time intervals, activating the refresh address generating circuit 12. At this time, a refresh control circuit 13 switches an address selector 10 and inputs its refresh address 20 to an address decoder 7 to refresh the line corresponding to the address and perform internal initialization. |
