发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PURPOSE:To remove the unnecessary junction capacitance added to the drain region and improve the drain junction withstand voltage by a method wherein a high concentration impurity region of the same conductivity type as that of a substrate is formed, by isolation from the drain region, at a part serving as the channel region of an MISFET constituting the following element, in a selected and fixed memory element of memory elements arranged in a matrix. CONSTITUTION:In the titled device equipped with ROM's arranged at intersections of word lines 8 (WL) and bit lines 16 (BL) extending in a matrix, the memory element composed of an MISFET is isolated in a semiconductor substrate 4 from the drain region D of the fixed MISFET Q23 wherein ROM content is written. In the semiconductor substrate at least of the part 6 (P) of the channel region, the semiconductor region 13 (P<+>) of an impurity concentration higher than that of the semiconductor substrate of the same conductivity type as that of said substrate is provided. Thereby, the inhibition of the elongation of a depletion region, formed from the drain region into the substrate, which would be generated by writing the ROM content can be relaxed, and the fixed threshold voltage for writing said content can be obtained.
申请公布号 JPS59217355(A) 申请公布日期 1984.12.07
申请号 JP19830090676 申请日期 1983.05.25
申请人 HITACHI SEISAKUSHO KK 发明人 HORINO NOZOMI
分类号 G11C17/00;G11C17/08;H01L21/8246;H01L27/112;H01L29/78 主分类号 G11C17/00
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