发明名称 MOS TYPE FIELD EFFECT TRANSISTOR AND MANUFACTURE THEREOF
摘要 PURPOSE:To alleviate the effect of hot electrons by decreasing the strength of electric field in the surface of the drain region by a method wherein the impurity doping profile of the source and drain regions of an N-channel MOS FET is put in a positive bevel structure at the end facing to a gate layer. CONSTITUTION:The impurity profile of the source and drain regions is so constructed that the positive bevel structure wherein the surfaces A'A'' of a P-N<+> junction formed by a P-layer 31 of the substrate and an N<+> layer 32 of the source and drain regions are at alpha>90 deg. to the junction surfaces AA'. Thereby, the expansion d2 of a depletion layer 33 to the surfaces A'A'' in case of impressing a reverse voltage between the drain and source becomes larger than the expansion d3 to the direction vertical to the surface AA', and accordingly the strength of electric field in the surface can be decreased more than that in the bulk. Further, conditions such as a channel length, the impurity concentration of the P-layer 31, the depth and angle alpha of the N<+> layer 32 are suitably chosen, thereby enabling to avoid the injection of hot electrons to the gate layer made of an oxide film 34 and a poly Si layer 35 even by an operating voltage.
申请公布号 JPS59198763(A) 申请公布日期 1984.11.10
申请号 JP19830072842 申请日期 1983.04.27
申请人 HITACHI SEISAKUSHO KK 发明人 AZUMA TAKASHI
分类号 H01L29/78;H01L29/08 主分类号 H01L29/78
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