| 摘要 |
PURPOSE:To enable the degree of high integration and miniaturization by providing a process, in which a growth layer groove corresponding to an etching groove is formed to an epitaxial growth layer and the ratio of the depth of the growth layer groove to its width is made larger than the ratio of the depth of the etching groove to its width, and a process in which a semiconductor element is formed to a projecting section surrounded by the growth layer groove. CONSTITUTION:When a groove 4 is formed and silicon is grown in an epitaxial manner through thermal decomposition, a growth rate in the groove 4 is brought to approximately 60% of a growth rate on the top surface 5a of the projecting section 5 because the state in which silane deposits in the groove 4 is brought and the supply of silane deteriorates. Epitaxial growth in the horizontal direction is generated. Consequently, the deep growth layer groove 8 of narrow width is formed. Though the ratio of the depth (10mum) of the etching groove 4 before forming the growth layer 7 to the width (25mum) of the groove 4 is 10:25, the ratio of the depth (14mum) of the growth layer groove 8 to the width (approximately 13mum) of the groove 8 is 14:13. |
