| 摘要 |
PURPOSE:To detect a short circuit between adjacent data lines at an output part, by generating an output in the form a signal obtained by inverting the output data given from each output buffer when a test word line is driven with each adjacent output buffer. CONSTITUTION:A test word line TW1 is driven, and Am-1=L and Am=L are supplied in the form of column (bit selection) address signals. Then bit line selecting circuits 61 and 62 select a bit line which is connected to both address lines A'm-1 and A'm (=H). Therefore the circuit 61 selects a bit line BL4. In this case, an output O1 of an output buffer 71 is set at ''L'' since a memory cell is set in an unwritten state at the intersection between the line BL4 and the line TW1. While the circuit 62 selects a bit line BL7. Then an output O2 of an output buffer 72 is set at ''H'' since a memory cell is set in a write state at the intersection between the line BL7 and the line TW1. |
