发明名称 INTERRUPTION CONTROLLING CIRCUIT
摘要 PURPOSE:To prevent the runaway of a program and adverse effect exerted on a system, by generating a return interruption instruction when an interruption source vanishes before a vector address is generated. CONSTITUTION:Interruption request signals IRQ1-IRQn outputs Pi via a controller 1 and an output Q6 via an FF6. The output Q6 is inputted to an NOR gate 7 together with the signals IRQ1-IRQn. The controller 1 outputs Pi1-Pin signals to a CPU2 with the signals IRQ1-IRQn. Before the CPU2 starts the interruption routine and the vector address is generated, if the signals IRQ1- IRQn all vanish, all the inputs to an NOR gate 7 go to a low level. Thus, a Q7 goes to a high level and a return interruption signal RTI is outputted from an FF8. Further, the CPU2 restores registers, and when the restoration is finished, a reset signal Pr is outputted, FFs 6, 8 are reset and the original program is executed.
申请公布号 JPS58192151(A) 申请公布日期 1983.11.09
申请号 JP19820075349 申请日期 1982.05.07
申请人 HITACHI SEISAKUSHO KK 发明人 AKAO YASUSHI
分类号 G06F9/46;G06F9/48 主分类号 G06F9/46
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