发明名称 LOGICAL CIRCUIT
摘要 PURPOSE:To attain high-density circuit integration and high speed, by combining nodes having a high and a low precharge potential suitably and turning off the logical block at the post-stage at the precharge. CONSTITUTION:When a precharge signal phip is a high potential Vcc and an inversion phip' is a low potential Vss (at precharge), nodes 31, 32 are precharged to the voltage Vcc and a node 21 is precharged to the voltage Vss. At the operation (signal phip set to the voltage Vss, signal phip' set to the voltage Vcc), when inputs 11, 12 are set to the voltage Vcc, transistors(TRs) T2, T3 are set and the node 31 is discharged into the voltage Vss. Thus, TRT42 is turned on and an output 21 goes to the voltage Vcc. Then, the desired logic is realized. Through the constitution like this, an output inverter which is required for domino C-MOS logical circuits is eliminated, and the high-density circuit integration, high speed and low power consumption are attained.
申请公布号 JPS58191529(A) 申请公布日期 1983.11.08
申请号 JP19820074756 申请日期 1982.05.04
申请人 TOKYO SHIBAURA DENKI KK 发明人 SAKURAI TAKAYASU
分类号 H03K19/096 主分类号 H03K19/096
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