发明名称 Output interfacing device receiving first and second input signals and providing an output circuit, and corresponding electronic circuit
摘要 <p>The device (300) has an offset switching stage (32) cascaded in downstream with a switching stage (31), where the stage (32) has high and low switching units (303`, 304`) respectively for switching an output signal. High and low inverters (301`, 302`) respectively act on the switching units via upstream high and upstream low control points (E, F), where high and low inverters (301, 302) of the stage (31) act on high and low switching units (303, 304) of the stage (31). A generation unit of the control points is time-staggered with respect to high and low memory points (C, D).</p>
申请公布号 EP1845621(A1) 申请公布日期 2007.10.17
申请号 EP20070105892 申请日期 2007.04.10
申请人 ATMEL NANTES SA 发明人 BENDRAOUI, ABDELLATIF;CHATAL, JOEL;GIBET, STANISLAS
分类号 H03K17/16 主分类号 H03K17/16
代理机构 代理人
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