| 摘要 |
PURPOSE:To attain the program processing of a CPU and direct access to a memory synchronously, by using the waiting function of the CPU for the direct access to the memory in the CPU to attain the access. CONSTITUTION:Receiving a data request signal RQ, a direct memory access controlling circuit 3 turns off a ready signal RDY indicating that the CPU1 is ready to use the memory to prevent the use of the memory from being overlapped and then executes memory access. Since the ready signal RDY is effective only when the CPU1 uses the memory 5, the operation of the CPU1 is not influenced by the memory access even if the direct memory access is executed during the clock period when the CPU1 does not use the memory 5. When the memory access by the CPU1 and the direct memory access are simultaneously generated, the ready signal RDY is turned off, so that the CPU1 is turned to a waiting status and the direct memory access is precedently executed. |
