| 摘要 |
PURPOSE:To completely reset a peripheral processor wherein micro-instructions are stored in a readable storage means by periodic resetting. CONSTITUTION:When a pulse signal is generated on a line RSO and stored in a flip-flop (FF)15, interruption of microinstructions is caused. Firmware selects another interface connection part 20(IFC) through a port number register 49 to set an FF24. Its output supperesses the detection of a signal CPW through a gate 23. Then, the firmware forces input and output operation, started by the IFC10, to stop, resetting a counter 16. Then, a timer 50 is actuated to read the output of a counter 26 in the IFC20 through an arithmetic part 47. At this time, said input and output operation started by the IFC20 is completed. When the contents of the counter 26 decrease to zero, the firmware sets an FF51. Then, the initialization of this peripheral processor is started. |
