发明名称 VIDEO PROCESSING LOGIC
摘要 <p>COMPUTER The computer system of this invention has, as the heart of the system, a simple processing unit for providing most data processing by the computer system under control of a read-only memory which contains only instructions and other data for the CPU. The system also includes a random access memory, a keyboard, a video terminal, and a port device is the form of a tape recorder/player. A master clock initiates timing used throughout the system. A multi-line data bus interconnects the CPU and the different memories of the system including the keyboard and the video RAM. Bi-directional communication is possible on the data bus. The addressing of these different memories is by way of an address bus from the CPU, which is a uni-directional bus. Data to be operated upon is basically stored in the random access memory. The keyboard is used for inputting data to the CPU and the video terminal is used for displaying data. Features of the present invention include a special reset scheme for the CPU, a multiplexing scheme for addressing the RAM, and a technique is for simply altering the control to provide capabilities of different capacity memories a alternate display of characters to provide, for example, either a 32character line or a 64-character line, an improved keyboard selection scheme, and improved video processing means.</p>
申请公布号 CA1139003(A) 申请公布日期 1983.01.04
申请号 CA19810383080 申请日期 1981.07.31
申请人 TANDY CORPORATION 发明人 LEININGER, STEVEN
分类号 G06F9/46;(IPC1-7):G06F9/46 主分类号 G06F9/46
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