发明名称 Microcomputer with logic for selectively disabling serial communications
摘要 A single-chip microcomputer includes a CPU (1), a RAM (2), a ROM (3), a timer (4), serial I/O communication logic (5), and four I/O ports (11-14). The serial I/O communication logic includes a control and status register (46), one bit (WU) of which may be utilized, when the microcomputer is connected in a distributed processing system having a shared serial communication line, to indicate that the CPU wishes to ignore a message not of interest to it. When the serial communication line again becomes free, the WU control bit is reset, enabling the CPU to intercept a new message of interest.
申请公布号 US4361876(A) 申请公布日期 1982.11.30
申请号 US19780939742 申请日期 1978.09.05
申请人 MOTOROLA, INC. 发明人 GROVES, STANLEY E.
分类号 G06F13/00;G06F13/12;G06F13/38;G06F15/16;G06F15/78;H03M5/12;H04L7/00;H04L25/49;(IPC1-7):G06F3/00;G06F7/00 主分类号 G06F13/00
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