| 摘要 |
PURPOSE:To reduce the power consumption of the titled circuit without reducing the operation speed, by connecting a level shifting means between the power source and the logical gate in the TTL type or DTL type decoder circuit. CONSTITUTION:A diode 10 is inserted between a resistance 2 and a power source VCC as a level shifting element and connected to them. When this decoder circuit having an AND gate composed of a multiemitter transistor 1 is not selected, the electric current (I) flowing from the power source VCC to the input side of the AND gate becomes I=(VCC-VT-VD-VIN)/R, where VCC is the supply voltage, VT is the voltage across the base and the emitter of the multiemitter transistor 1, VD is the forward voltage of the diode 10, VIN is the input signal level of the AND gate, and R is the value of the resistance 2. Therefore, the electric current I becomes smaller because the forward voltage VD of the diode 10 for level shifting exists, and thus, power consumption at the time when the decoder circuit is not selected can be reduced. |
