发明名称 FORMATION OF HYBRID IC MODULE
摘要 PURPOSE:To reduce the number of manufacturing processes, prevent deterioration due to heat fatigue and to reduce cost by a method wherein solder with a fusing point higher than those of solder electrodes of a parent substrate and a non-IC chip is joined to an IC chip, allowing the solder to collectively reflow at such temperatures that the solder is not melted. CONSTITUTION:An IC chip 2 made of Si and a ceramic chip supplied with elements that provide resistor and capacitor are joined with solder to a parent substrate 1 made of ceramic to make a module. Pieces of solder 6, 7 and 11 closely allied to an eutectic component of Sn-Pb with a low fusing point are respectively joined to the substrate 1 and the chip 3 via connecting electrodes 4, 5 and 9. On the other hand, solder 10 composed of 5-10% Sn-Pb with a high fusing point is attached to the Si chip 2 via an electrode 8. After each connecting position has been adjusted, a reflow process is added at temperatures (240-250 deg.C) at which the solder layer with a low fusing point does not melt. By so doing, the reflow process does not have to be repeated more than once and the chip 2 and the substrate 1 are connected together at a diffusion layer 12 of each of the solder layers 6, 10. Since solder 10 rich in Pb is allowed to remainon the periphery of the chip 2, heat deterioration resistance can be sufficiently secured.
申请公布号 JPS5773947(A) 申请公布日期 1982.05.08
申请号 JP19800149415 申请日期 1980.10.27
申请人 HITACHI SEISAKUSHO KK 发明人 SAKAGUCHI MASARU;ISHI ICHIROU
分类号 H05K3/34;B23K1/00;H01L21/60 主分类号 H05K3/34
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