发明名称 VIRTUAL COMPUTER SYSTEM
摘要 PURPOSE:To improve the hit rate of a TLB (address conversion index buffer mechanism) by preserving the contents of the TLB in a prescribed area when a virtual computer in process of execution is switched. CONSTITUTION:A logical address read out from a TLB2 is compared 3 with the contents of a logical address register 1 and the segment table origin (STO) of the TLB2 is compared 4 with the STO of an STO register 6. When comparing circuits 3 and 4 both output coincidence signals, an actual address from the TLB2 is used. When the circuits 3 and 4 output anticoincidence signals, a DAT logic 13 generates the actual address on the basis of the contents of the register 1. This actual address combined with the STO and part of the logical address and the resulting address is registered in the TLB2.
申请公布号 JPS5730180(A) 申请公布日期 1982.02.18
申请号 JP19800104699 申请日期 1980.07.29
申请人 FUJITSU LTD 发明人 INBE HISASHI
分类号 G06F12/10 主分类号 G06F12/10
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