| 摘要 |
PURPOSE:To miniaturize a device and to improve its reliability by detecting a phase difference between a clock pulse regeneration output and a received clock pulse, and by putting the regeneration output and received clock pulse in phase with each other by making a correction when the both are out of phase. CONSTITUTION:The rising part of the clock pulse HCLP of a transmission system is differentiated 1 and the result is sent to a frequency divider 9 via an OR circuit 8 and an AND circuit 6. The frequency divider 9 with a frequency division ratio N has pulse width which corresponds to the 1st prescribed number of input pulses and generates a clock pulse regeneration output CLP. Received clock pulses CLK have a prescribed pulse width and the same frequency with the output CLP. A phase difference between both the signals is detected by a comparing circuit 3 and when the both are out of phase with each other, differential pulses concerning high- frequency clock pulses inputted to the frequency divider or phase-advancing pulses are removed or additionally inserted according to the extent of the phase leading or lagging, thereby putting both the clock pulse in phase with each other. |
