| 摘要 |
<p>PURPOSE:To speed up the operation of the titled system by disposing logical parts around a memory circuit, packaging them on the same semiconductor chip, and making signals between circuits complementary signals that complement each other. CONSTITUTION:The logic parts LOG1, 2 are provided in front of and to the rear of a RAM, and respective circuit blocks are formed on the same one piece of semiconductor chip ICCHIP. In the LOG1, only an input buffer IB that forms a signal of low amplitude is provided, and no output buffers are provided. An address signal supplied from the LOG1 to the RAM and a data signal supplied from the RAM to the LOG2 are complementary signals respectively. Accordingly, the amplitude of a signal can be made lower in comparison to a case where a signal is transmitted/received through one piece of signal line. As a result, the shifting of signals come swifter and the delay time of the entire circuit also is made shorter, thus the operating speed of the system is improved. Furthermore, the complementary signal has a double margin against noise.</p> |
