发明名称 SEMICONDUCTOR CIRCUIT
摘要 PURPOSE:To set the bias point of an inverter at VDD/2 and at the same time increasing the degree of amplification, by setting the betaR (gm of driving side transistor/ gm of load side transistor) of a bias circuit equal to or larger than the betaR of the inverter. CONSTITUTION:The betaR of an inverter consisting of the depression MOS transistor 17 of N channel and the enhancement MOS transistor 18 of N channel is set larger than that of the ordinary logic circuit to increase the degree of amplification. A connection is given between the depression MOS transistor 13 of N channel and the enhancement MOS transistor 14 of N channel to form a bias circuit. Then the betaR of this bias circuit is set larger than that of an inverter. In this way, the bias point of the inverter can be set at VDD/2 without worsening the degree of amplification.
申请公布号 JPS56140719(A) 申请公布日期 1981.11.04
申请号 JP19800043011 申请日期 1980.04.02
申请人 TOKYO SHIBAURA ELECTRIC CO 发明人 MIYAZAWA KANICHI;AOKI KAZUHIDE
分类号 H03K5/08;H03K19/0944 主分类号 H03K5/08
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