发明名称 |
Data processing apparatus having op-code extension register |
摘要 |
A Central Processing Unit (CPU) includes a hardware op-code extending register (OER) for storing a code for programmable selection of optional CPU features which modify processor operations defined by the op-code in each instruction. A control section in the CPU decodes both the op-code of a current instruction and the code in the OER, effectively combining the two to form an extended op-code capable of defining a larger set of processor operations than the op-code carried in each instruction. The code in the OER is changed only when the CPU executes an instruction for transferring a new code into OER. Thus the code in OER can remain stationary over many instruction cycles. |
申请公布号 |
US4293907(A) |
申请公布日期 |
1981.10.06 |
申请号 |
US19780974426 |
申请日期 |
1978.12.29 |
申请人 |
BELL TELEPHONE LABORATORIES, INCORPORATED |
发明人 |
HUANG, VICTOR K.;RUTH, RICHARD L. |
分类号 |
G06F9/318;G06F13/00;G11C8/00;(IPC1-7):G06F13/00 |
主分类号 |
G06F9/318 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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