发明名称 D/A CONVERTING CIRCUIT
摘要 PURPOSE:To make a time constant of an LPF small, and to improve the responsiveness of an analog signal by dividing a digital input signal into plural blocks, and executing a D/A conversion of every block by plural D/A converting parts. CONSTITUTION:A digital input Din is divided into blocks Din1, Din2, and by counters 21, 22 and coincidence detecting circuits 31, 32, a D/A conversion by a pulse width modulation is executed at every block. As a result, a period T of the first and second pulses Po1, Po2 indicated by an expression I in which a period of a clock phi is (t). Also, the duty width of the pulse Po1 is the time when a counting value Cout1 of the counter 21 reaches a data value of the lower digit block Din1 from the time of '0'. Moreover, the duty width of the pulse Po2 is also the time when a counting value Cout2 reaches a data value of the upper digit block Din2 from '0' in the same way. Accordingly, the period T of the pulse Po1+Po2 inputted to an LPF4 is shortened, and a time constant can be made small.
申请公布号 JPS63310221(A) 申请公布日期 1988.12.19
申请号 JP19870145049 申请日期 1987.06.12
申请人 HITACHI LTD 发明人 SATO TETSUO
分类号 H02P7/06;H03M1/68;H03M1/82 主分类号 H02P7/06
代理机构 代理人
主权项
地址
您可能感兴趣的专利