发明名称 ERASING CIRCUIT OF RESIDUAL VOLTAGE IN HALL ELEMENT
摘要 PURPOSE:To obtain a stabilized output by a method wherein a positive electrode of a controlling current supplying power source and one terminal of an indicator are connected through change-over switches to two terminals which are the power source terminals of the three-terminal Hall element, and also the rest one terminal of the element, a negative electrode of the power source and the other terminal of the indicator are grounded. CONSTITUTION:The change-over switches 25 and 26 are connected to the two power terminals 22, 23 which are fitted on the three-terminal Hall element 21, and when the switches are turned to one side the power terminal 22 is adapted to be connected to the positive electrode 27 of the controlling current supplying power source and the power terminal 23 to the one terminal 29 of the indicator. When the swithes are turned to the other sides, those connections are reversed to cause the terminal 23 and the positive electrode 27 to be connected, and the terminal 22 and one terminal 29 of the indicator to be connected, respectively. In addition, the rest terminal 24 of the element 21, the negative electrode 28 of the power source and the other terminal 30 of the indicator are made earthing potentials through a common earthed circuit l0 Thus, the numbers of the change-over switches are reduced by half and the residual voltages in the element are erased.
申请公布号 JPS56114389(A) 申请公布日期 1981.09.08
申请号 JP19800017136 申请日期 1980.02.14
申请人 NIPPON KURINGEEJI KK 发明人 HINO MITSUAKI
分类号 H01L43/06;H01L43/04 主分类号 H01L43/06
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