| 摘要 |
PURPOSE:To eliminate charge unbalance between digit lines by setting the absolute threshold level of MISFET, selecting a connection between two digit lines, lower than the threshold level of each digit line precharging MISFET. CONSTITUTION:The absolute threshold level of MISFETQ33 making a selective connection between digit lines D1 and D1' is set much lower than the threshold levels of precharging MISFETs Q31 and Q32 connected to FETQ33 at gates in common. As a result, as precharging voltage P rises, only FETQ33 conducts firstly to hold nodes N31 and N32 of lines D1 and D1' at the same potential. Next, as voltage P rises further, nodes N31 and N32 are charged without unbalance according to differences in threshold level between the above-mentioned voltage and FETs Q31 and Q32 even if threshold levels of FETs Q31 and Q32 vary slightly because FETQ13 stays ON, so that the memory unit will increase in sensitivity. |
