发明名称 SEMICONDUCTOR MEMORY UNIT
摘要 PURPOSE:To simplify wiring constitution by taking the center of a word line as a feeding point with regard to Integrated Injection Logic (I<2>L) in matrix array. CONSTITUTION:Memory cells Ce1... constituting I<2>L are arrayed in a matrix and the common (n) type conductive area of the memory array in the word line direction forms word line W while transistor Q7 in the center constitutes an electric current source. This constitution makes it possible to apply each cell with an even electric current like when transistors at both the ends are used as electric power sources; and a connection to bias circuit BC in the center of the array of bit driver BDV can be made, where two unneeded parallel bit lines l5 and l6 can be used as electric power current supply lines. The wiring constitution is therefore simplified more than that of the system which supplies bias currents from transistors at both the ends.
申请公布号 JPS5641584(A) 申请公布日期 1981.04.18
申请号 JP19790110719 申请日期 1979.08.30
申请人 FUJITSU LTD 发明人 TOYODA KAZUHIRO;OONO SATOSHI
分类号 G11C11/41;G11C5/06;G11C11/411;G11C11/414;H01L21/822;H01L21/8226;H01L21/8229;H01L27/04;H01L27/082;H01L27/102;H01L29/78;H03K19/091 主分类号 G11C11/41
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