发明名称 NOISE PATTERN ERASE CIRCUIT FOR BINARY VIDEO SIGNAL
摘要 PURPOSE:To simplify the circuit constitution, by locating the check point for pattern discrimination under a rule in scattering. CONSTITUTION:From the bit location included in the shift register(N-bit capacity for each row unit shift register) of 10 stage constitution shifting binary video signal sequentially, the bit location P being each group pattern erase point for the check points A0-A3, and check points B(B0, B1), C(C0, C1), D(D0, D1), E(E0, E1) and F(F0, F1), is obtained,and the bit information at bit location obtained is inputted to the erase circuit constituted of AND gates 19-23,25 and OR gate 26, then from the OR gate 26, the bit information relating to the erase or correction of the pattern erase point P is outputted and this is sequentially shifted to the succeeding bit location as the bit information at the pattern erase point P.
申请公布号 JPS55124872(A) 申请公布日期 1980.09.26
申请号 JP19790031798 申请日期 1979.03.20
申请人 HITACHI LTD 发明人 MAKIHIRA TADASHI;OKAMOTO KEIICHI;UTO YUKIO
分类号 G06T5/00;G06K9/40 主分类号 G06T5/00
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