| 摘要 |
PURPOSE:To make it possible to regenerate a clock signal with a few noises after a period of transient response by quickening the transient response in the beginning of a burst, by alternating PLL with excellent noise-proof characteristics and a broad-bank resonance circuit. CONSTITUTION:An input signal to terminal 101 is supplied to clock extraction circuit 1, where its clock component is extracted. Its output has its nose component removed by resonance circuit 4 and is made into a clock signal of constant amplitude by amplitude limiting circuit 3. To quicken a rise in phase in the beginning of a burst, the band width of circuit 4 is widened and when an output signal from circuit 3 is inputted to PLL10, the output phase of voltage control oscillation circuit 6 changes in the beginning of the burst. This change is expressed as a voltage in the output of phase comparator circuit 5. Then, detection circuit 8, when detecting this voltage exceeding a certain range, operates switching circuit 9, so that a signal obtained switching the output of circuit 6 to that of circuit 3 will appear at terminal 102. |
