发明名称 MEMORY UNIT
摘要 PURPOSE:To enable to diagnose the error correction circuit by arbitrary test pattern, by reading out the information written in the read only memory circuit. CONSTITUTION:The unit provides the error correction code generating circuit 1 producing the error correction code 14 and given with the write-in information 11, readout or write-in memory circuit 3 inputted with the information 11 and the code 14 and outputting the first readout information 15 including the error correction code with the instruction of the address designation code 12 and the write-in or readout designation code 13, and read only memory circuit 4 taking the second readout information 16 including the code 14 as output with the instruction of the codes 12 and 13. Further, the syndrome generation circuit 5 inputting the information 15 and 16 and outputting the syndrome 17, syndrome interpretation circuit 6 inputting the syndrome 17 and outputting the error position designation code 18, and error correction circuit 7 inputting the code 18 and the information 15, 16 and outputting the third readout information 19, are provided. As a result, the error correction circuit 7 can be diagnosed with an arbitrary test pattern.
申请公布号 JPS54122937(A) 申请公布日期 1979.09.22
申请号 JP19780030791 申请日期 1978.03.16
申请人 NIPPON ELECTRIC CO 发明人 KOBAYASHI HIDEHIKO
分类号 G11C17/00;G06F11/08;G06F11/10;G06F12/16;G11B20/18;G11C29/00;G11C29/12 主分类号 G11C17/00
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