发明名称 |
NONNSYNCHRONOUS DIGITAL DIVISION SYSTEM |
摘要 |
PURPOSE:To omit the decoder circuit to simplify the circuit constitution by presetting the preset value necessary for N-division at the set terminal with no use of the reset terminal of FF which forms a binary counter. |
申请公布号 |
JPS53131748(A) |
申请公布日期 |
1978.11.16 |
申请号 |
JP19770045775 |
申请日期 |
1977.04.22 |
申请人 |
HITACHI ELECTRONICS |
发明人 |
KONDOU KOUICHI |
分类号 |
H03K23/58;H03K3/72;H03K23/00 |
主分类号 |
H03K23/58 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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