Frequency response equalizer

摘要

A frequency response equalizer includes a parallel combination of a low-pass integrating circuit and a high-pass differentiating circuit. Both circuits receive an input signal from a reproduce head followed by a preamplifier. Each circuit provides a 90 DEG phase shift with respect to the input signal, equal in magnitude and opposite in sense. A subtraction circuit coupled to the respective outputs of both the integrating and differentiating circuit provides a difference signal of the respective output signals of both circuits. The resulting difference signal represents an amplitude and phase equalized signal.