发明名称 MEMORY CIRCUIT
摘要 PURPOSE:To enable the integrating memory circuit satisfying the three inputs truth value and having simple configuration and less power consumption, by improving the logic input section controlling the memory cell by using PNPN type transistor having 0 power consumption with off condition.
申请公布号 JPS52125244(A) 申请公布日期 1977.10.20
申请号 JP19760041292 申请日期 1976.04.14
申请人 HITACHI LTD 发明人 OOHINATA ICHIROU
分类号 G11C11/41;G11C11/411;H04Q3/52 主分类号 G11C11/41
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