摘要 |
<p>The error detector, for a digital transmission system, divides the binary pulse train such that the sum of the magnitudes of the pulses in each train forms a given limit or lies between two given limits. If the given limit is exceeded by certain pulse trains then an error is deemed to be present. The pulses are summed using a counter (UDC). The sync signal is used to delineate groups of pulses for counting -ie the sync signal is transmitted before each pulse train.</p> |