| 摘要 |
1468438 Analogue to PCM interconverter SIEMENS AG 30 May 1974 [29 June 1973] 23934/74 Heading H3H A circuit for converting analogue signals to pulse code modulation and vice versa using a non-linear conversion curve comprises a pulse train fed register associated with a digital to analogue converter and integrator which together produce an analogue signal and the corresponding, non-linearly related digital (PCM) signal. For analogue to PCM transmission, the register is clocked until the generated analogue value equals the input analogue sample, the register contents being transferred to a store and transmitted. For PCM to analogue conversion, the register is clocked and its contents compared with the input PCM signal, the analogue signal being transmitted at equality. As shown, clock generator TG supplies clock pulses to Register Reg which comprises eight divide by two circuits. The output of the last divider stage is supplied to differentiator IS which supplies pulses operating the circuit input and output gates. The divider contents are fed to digital comparator Vgl 2 the other input of which comes from PCM input gates e1-e8 and dynamic store Span, to blocking gates GS1-GS8, output store Spab and output gates Ga1-Ga8 and, in part to digital to analogue converter DS and DG which generates a voltage corresponding to the register contents. The analogue input voltage is stored on capacitor C1 and compared with the generated analogue at Vg11 and the output analogue voltage is stored on capacitor C2 prior to transmission. The analogue signals are transmitted to and from subscriber station Tln. In operation, register Reg is cycled continuously by the clock puless. For analogue to PCM conversion, at the start of a cycle a pulse from differentiator IS closes switch Sab and sets the analogue voltage on capacitor C1. When comparator Vg11 signals equality of input and generated voltage, bi-stable FF is set closing gates GS1 and GS8 and preventing further change in store Spab which normally contains the same value as the Register Reg. At the end of the register cycle the pulse from IS enables gates Ga1-Ga8, transmitting the PCM signal and resets bi-stable FF. The pulse also closes switch Sab starting the next conversion cycle. For PCM to analogue conversion, the PCM input at e1-e8 is applied to store Span on a pulse from IS. At equality in comparator Vgl2, switch San1 is closed and the generated voltage is transferred to C2. At the end of the cycle San 2 is closed and transmits the analogue signal. |
