| 摘要 |
<p>A ferrite core memory system is used which includes an address register, and address decoding, and integrated circuits for selection and storage, in which the integrated circuit for selection can be used in a large capacity unit without the need for suppression of the effects of stray capacity of matrix leads. There are address decoders, several selection circuits and a matrix which are kept at a floating voltage by means of coils in the X and/or Y lead. There are groups of the matrix between the address register and address decoders, the windings being in series with the reading and writing wires. The wires may be twisted together and may be wound on a common toroidal or double-window core of ferrite.</p> |
