| 摘要 |
PURPOSE:To increase the synchronism acquisition speed and to stably monitor the synchronism settling state in the synchronous control system where the bit error in a specific position of one block including an error correction code is detected to perform the synchronous control. CONSTITUTION:Before settlement of synchronism, the presence or the absence of the bit error in the specific position is decided by syndrome calculation in a successive syndrome calculation circuit 1, and a synchronism protecting circuit 3 outputs a synchronism settlement signal SYC when the presence of the bit error in the specific position is discriminated M times continuously. After settlement of synchronism, the presence or the absence of the bit error in the specific position is decided by syndrome calculation in a reset type syndrome calculation circuit 2, and the synchronism protecting circuit 3 outputs a step-out decision signal NSY when the absence of the bit error in the specific position is discriminated N times continuously. If synchronism is not settled at the time of power-on or over a set time, the successive syndrome calculation circuit 1 is initially reset by an initial reset circuit 4. |
