摘要 |
PURPOSE:To reduce the peripheral components and external terminals by incorporating a pulse delay circuit producing a keyed AGC use key pulse in a monolithic IC. CONSTITUTION:A separation synchronizing signal (b) is applied to a peak detection circuit 6 from an input terminal 5, and the peak of this synchronizing separation signal is sampled. The sampled potential is discharged at nonsampling period at a fine current discharge circuit 7 to output the output (c). When a comparator 8 is constituted so that a high potential is outputted with higher input level than a compared potential (f) and a low potential is outputted with lower level, a pulse (d) is obtained. This comparator output is inputted to a keyed AGC detection circuit 9 as a key pulse. On the other hand, a video signal (a) of an AGC output is supplied from an input terminal 10 and a signal added with white pulse at the back porch period of the synchronizing signal (e) is produced at the key pulse (d), allowing to obtain a detected signal. |