AUTOMATIC ADJUSTING CIRCUIT FOR CLOCK PHASE AND PULSE WIDTH

摘要

PROBLEM TO BE SOLVED: To match the phase and pulse width of a clock supplied to the reception end of a transmission line with those of a reference clock waveform without increasing the number of clock transmission lines by comparing a LOW-side phase difference with a HIGH-side phase difference and adjusting the middle point between a LOW-side variation point and a HIGH-side variation point to a specific phase. SOLUTION: An encoder 211 outputs ENCL obtained by encoding signals L0 to L3 and a subtracter 231 subtracts a value REFL set previously in a LOW- side phase reference setting means 221 from ENCL and outputs the result as the phase difference SUBL from the LOW-side reference. Then an encoder 212 encodes outputs ENCH obtained by encoding signals H0 to H3 and a subtracter 232 subtracts ENCH from a value REFH set previously in a HIGH-side phase reference setting means 222 and outputs the result as the phase difference SUBH from the HIGH-side reference. Then the middle point is matched with some timing reference to adjust the phase of the clock reaching the reception end.