| 摘要 |
A PLL Frequency Synthesizer includes a reference signal source which outputs a reference frequency signal. A phase of the signal out of the reference signal source and a phase of a signal coming back through a feed-back loop are compared by a phase comparator which detects the phase difference between them. The output of the comparator is integrated by a low pass filter which generates a voltage output corresponding to the phase difference. A voltage controlled oscillator is also provided to the PLL Frequency Synthesizer of the invention, an output frequency of which is controlled by the amplitude of a signal out of the low pass filter. The output signal out of the voltage controlled oscillator is divided by a variable divider whose denominator can be variable from outside. A frequency multiplier is provided between the phase comparator and the variable divider so as to multiply the frequency of signal derived from the variable divider.
|
