发明名称 Zero setup time flip flop
摘要 Circuits and methods for a zero setup time storage element are disclosed. A storage element having a data input terminal, a clock input terminal and a data output terminal is able to capture a logic value of a data signal on the data input terminal with a substantially zero setup time at an active edge of a clock signal. Furthermore, some embodiments of the storage element are able to drive the captured logic value until the next active edge. One embodiment of the storage element includes a control circuit coupled to an output driver circuit. Depending on the state of the data input signal during an active edge, the control circuit can drives a first control signal to the output driver circuit or a second control signal to the output driver circuit. The output driver drives a data output signal on the data output terminal of the storage element based on the values of the control signals.
申请公布号 US5867049(A) 申请公布日期 1999.02.02
申请号 US19960754739 申请日期 1996.11.21
申请人 SUN MICROSYSTEMS, INC. 发明人 MOHD, BASSAM J.
分类号 H03K3/356;(IPC1-7):H03K3/356 主分类号 H03K3/356
代理机构 代理人
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