发明名称 |
METHOD FOR GENERATING AN ELECTRONIC CIRCUIT MODELLING SUBSTRATE COUPLING EFFECTS IN AN INTEGRATED CIRCUIT |
摘要 |
The present invention relates to design and manufacture of integrated circuits and more particularly to electrical modelling of integrated circuits combining high voltage power devices with low voltage control logic blocks, and even more particularly, the modelling of substrate coupling effects in these circuits. |
申请公布号 |
WO2016207374(A1) |
申请公布日期 |
2016.12.29 |
申请号 |
WO2016EP64711 |
申请日期 |
2016.06.24 |
申请人 |
UNIVERSITÉ PIERRE ET MARIE CURIE;CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE - CNRS - |
发明人 |
ISKANDER, Ramy;ZOU, Hao;MOURSY, Yasser |
分类号 |
G06F17/50 |
主分类号 |
G06F17/50 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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