| 摘要 |
<p>PURPOSE:To provide a counter read circuit which reads time data from a counter circuit at a time and which reduces the burden of a program. CONSTITUTION:Buffer registers 31a-31g which can individually store data of respective counters are connected to the respective counters 30a-30g of a second, a minute, an hour, a day, a date, a month and a year. The event generation signal S2 of the update/carry of the second counter is used for deciding timing when data is transferred from the respective counters 30a-30g to the buffer registers 31a-31g. CPU 2 reads data stored in the buffer registers 31a-31g with the event generation signal as a trigger. The confirmation of the justification of data such as to confirm the matching of counter data twice and to confirm whether carry does not occur by referring to a carry flag is not required, and the load of the program can be reduced.</p> |
